Indian Institute of Technology
Applications are invited from motivated and eligible candidates for the position of Senior Research Fellow (SRF) / Junior Research Fellow (JRF) in a DST funded Research Project titled ” Reducing computational complexity using FPGA to study structure and dynamical properties of nanoparticles”.
Job Title:Â SRF / JRF
No. of Posts: 1
Project Title: “Reducing computational complexity using FPGA to study structure and dynamical properties of nanoparticles”.
Objective of the Project:
The objective of the project is to reduce computing time of a computationally intensive code by running it on a massively parallel FPGA platform. To gain understanding of the parallel structure in FPGA, a simple mathematical operation (matrix multiplication) involving huge data needs to be implemented. This will be followed by development of artificial neural network based potentials for nanoparticles on FPGA platform. Interested candidates can email for more information.
Qualifications:
- Essential –Â (i) M.Tech./M.E. degree and 2 years of research experience in Computer Science and Engineering/Electrical and Electronics Engineering/or in equivalent streams with a valid GATE score. OR (ii) M.Sc degree in Physics/Chemistry and 2 years of research experience with a valid GATE or CSIR/UGC-NET or JEST score. OR (iii) Candidates not having the required qualification but feel thay are suitable for this project, may also apply by providing justification and qualifications. These candidates may be considered for a JRF position.
Application Instructions:
1. Interested candidates are requested to submit a detailed CV to Dr. Srivathsan Vasudevan, Discipline of Electrical Engineering, Indian Institute of Technology Indore, via email:[email protected] latest by October 10, 2017.
2. Complete information with respect to GATE, NET or JEST score such as year of passing, discipline, score, marks, All India Rank and number of candidates appeared should be mentioned in the CV. Incomplete applications will be rejected. The deadline for submission of applications is Oct 10, 2017.
3. Only shortlisted candidates will be be intimated by email for interview. Selected candidates will be intimated by e-mail. No TA/DA will be paid for appearing in the interview. No communication with regard to to selection process would be entertained.
4. Merely fulfilling the eligibility will not entitle any candidate for shortlisting
Application Deadline –Â Oct 10, 2017.
